Liquid crystal displays and organic EL displays having been used lately as flat panel displays. The displays will exhibit enhanced perform if they employs an active matrix in which each display pixel has a switching (active) element, such as a thin film transistor (TFT). These active matrix substrates are used in many personal computers (PC) and mobile phones, to name a few examples.
To form thin film transistors (TFTs) on a glass substrate, an amorphous silicon layer was originally used in view of the constraints on the thermal resistance temperature of the glass substrate. Recently, polycrystalline silicon transistors have been manufactured by either polycrystallizing the amorphous silicon layer or depositing a polycrystalline silicon layer in the first place. With much improved mobility, the polycrystalline silicon transistor boasts higher performance than the amorphous silicon transistor. The use of a polycrystalline silicon layer allows driver circuitry to be formed on the same substrate. These features are being pursued for the development of new transistors with enhanced performance and reduced power consumption.
One of polycrystallization techniques involves the scanning of the amorphous silicon layer with a linear excimer laser. The technique is capable of efficient crystallization of a large-area amorphous silicon layer, but the obtained grain sizes of polycrystalline silicon are small.
Also, new crystallization techniques are being proposed to further enhance the TFT performance. It is reported that lateral growth involving the use of continuous wave (CW) laser can achieve greater grain sizes. The CW laser forms a tiny spot, capable of fabricating an island in the semiconductor layer, which is often followed by crystallization.
High speed driver circuits are desirable for liquid crystal displays. The driver contains a display controller and a shift register. Those TFTs for which high speed operation is expected preferably have short channel length and contain no LDD structure. The circuit therefore desirably operates on low power supply voltage. Typically, to reduce the power supply voltage, the threshold of the TFT needs to be reduced too, which in turn requires to thin down the gate insulating film.
The LCD driver circuit contains an output buffer, level shifters, and analog switches. Preferably, these components will withstand high voltages, that is, the components will operate at high voltages. The TFTs in these components need to operate at high voltage rather than at high speed. So do pixel TFTs. The high-voltage TFTs need to operate at desired high voltages and preferably contain a LDD structure and a gate insulating film with a conventional thickness.
It is difficult for the same TFT structure to meet both the high speed operation (low withstand voltage) and the high withstand voltage requirements. Accordingly, an approach is being proposed to form 2 types of TFTs on the same substrate. High-voltage TFTs are provided with a thick gate insulating film, and high-speed-operation (low withstand voltage) TFTs with a thin gate insulating film.
Japanese Unexamined Patent Publication 2003-45892 (Tokukai 2003-45892; published Feb. 6, 2003) proposes formation of an islands-shaped semiconductor layer and subsequent formation of a first gate insulating layer suitable for low-voltage TFTs. For low-voltage transistors, the gate electrodes are provided on the layer. For high-voltage transistors and pixel transistors, a second gate insulating layer is further provided on the first gate insulating layer, with the gate electrodes being provided on the second gate insulating layer. The first gate insulating layer for the low-voltage transistors is, for example, 30 nm thick. The gate insulating layer for the high-voltage transistors and pixel transistors which is a stack of the first and second gate insulating films is, for example, 110 nm thick.
Japanese Unexamined Patent Publication 2003-86505 (Tokukai 2003-86505; published Mar. 20, 2003) proposes approach where an amorphous semiconductor layer is patterned to islands. The amorphous layer is polycrystallized under a continuous wave (CW) laser beam from a diode-pumped solid-state (DPSS) laser through the back surface of the transparent substrate. The Publication describes this crystallization method produces large grains.
In TFT manufacture, an impurity is activated by laser annealing with an excimer laser or thermal annealing. In the excimer laser annealing, the gate lines may be made of aluminum or an aluminum alloy for low resistance. To obtain high reliability, the thermal annealing is preferred. This is especially so when high-speed-operation circuits are to be constructed of dedicated TFTs and when CW laser beams are to be used in crystallization. In the thermal annealing, the gate lines are made of a metal with a high melting point. Aluminum and its alloys are not suitable.
Japanese Unexamined Patent Publication 11-281997/1999 (Tokukaihei 11-281997; published Oct. 15, 1999) describes that driver-circuit TFTs are required to exhibit low threshold and high mobility and that pixel TFTs are required to exhibit high threshold and low mobility. To fulfill these requirements, the Publication proposes to thin down a part of the undoped amorphous silicon layer by etching and stack a B-doped amorphous silicon layer on the undoped layer. The amorphous layers are then crystallized. The pixel TFTs are formed from the resultant thick polycrystalline silicon layers where the average grain size is small and the mobility is low. The driver-circuit TFTs are formed from the thin polycrystalline silicon layer with a low B concentration where the average grain size is large and the mobility is high.
Further, there are various requirements on high-voltage transistors. Pixel transistors are required to allow small leak current; operation speed does not really matter. The high-voltage transistors in peripheral circuits are preferably able to operate at high speed; leak current is allowable to some extent. It is desirable to manufacture these thin film transistors with different properties in the least possible steps.